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Compiler Engineer for Tile-based AI DSLs

In short. Compiler Engineer for Tile-based AI DSLs at Intel: a full-time mid-level role, on-site in Santa Clara, CA. Posted salary: $150K – $285K. Asks for 4+ years of experience. Main work: Develop new features and resolve software defects in Intel compilers targeting CPU and GPU architectures. Skills mentioned: C++, C, CUDA. Posted Oct 30, 2026, checked on the employer's site 28 min ago.

Salary$150K – $285K / year
LocationSanta Clara, CA
FormatOn-site
TypeFull-time
LevelMid level
PostedOct 30, 2026 · 2 days ago
Checked on Intel's careers page 28 min ago · via Workday0 views
  • Salary listed
  • No sponsorship

Opens Intel's own application page. No sign-up on Sudo Get Job.

Summary

In this position as a Compiler Engineer, you will focus on enhancing and maintaining cutting-edge compiler software tools optimized for Intel processors. Your day-to-day responsibilities will revolve around feature development, performance optimization, and resolving software defects to ensure the high quality and efficiency of compiler-generated code.

Quoted from Intel's description, not rewritten.

Skills mentioned

About the role

Job Details

Job Description 

The Role and Impact

In this position as a Compiler Engineer, you will focus on enhancing and maintaining cutting-edge compiler software tools optimized for Intel processors. Your day-to-day responsibilities will revolve around feature development, performance optimization, and resolving software defects to ensure the high quality and efficiency of compiler-generated code. You will play a critical role in enabling developers worldwide to maximize the performance of Intel's CPU and GPU platforms.
Business Group

As part of Intel's Data Center Group (DCG), the Compiler Technology Innovation team is responsible for developing industry-leading compiler tools that support Intel's processors. The team operates at the forefront of the software stack, driving innovation in high-performance computing, artificial intelligence, and heterogeneous computing. Through collaboration across engineering teams and contributions to open-source communities, the group plays a pivotal role in advancing Intel's leadership in processor technology.
Key Responsibilities

  • Develop new features and resolve software defects in Intel compilers targeting CPU and GPU architectures.
  • Optimize compiler code generation for performance improvements across diverse applications and benchmarks.
  • Conduct functional, performance, and stress tests on compiler tools to ensure quality and reliability.
  • Collaborate across geographies with engineering, validation, and performance teams to enhance product quality and usability.
  • Contribute to open-source initiatives, including LLVM.

The ideal candidate should exhibit the following behavioral traits

  • Ability to work independently and effectively in a collaborative environment
  • Strong ownership mindset with a proactive approach to resolving challenges.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This position is not eligible for Intel Immigration sponsorship.

Minimum Qualifications

  • Bachelor's degree in Computer Science, Applied Mathematics, Informatics, or a related technical field plus 4+ years of experience.

OR

  • Master’s degree in in Computer Science, Applied Mathematics, Informatics, or a related technical field plus 3+ years of experience.

OR

  • PhD degree in in Computer Science, Applied Mathematics, Informatics, or a related technical field plus 1+ years of experience.

The experience listed above should be a combination of the following:

  • Experience in C/C++, SYCL, CUDA, DSLs, object-oriented programming, and development of production-quality compilers or similar software tools.
  • Proven expertise in compiler architecture and software optimizations for CPU/GPU performance.
  • Experience with troubleshooting and resolving technical issues and debugging skills.

Preferred Qualifications

  • Experience with parallel programming models, such as OpenMP, and vectorization techniques.
  • Hands-on experience with LLVM, MLIR, TileIR compiler framework, including compiler optimizations and code generation for efficient CPU performance.
  • Knowledge of performance analysis tools (e.g., perf) and modern CPU/GPU architecture.
  • Familiarity with language runtimes, memory models, and scheduling optimization across heterogeneous architectures.
  • Proven cross-industry collaboration on language standards and specifications.

Join our team of innovators and become an integral part of advancing compiler technology that drives performance breakthroughs across diverse computing workloads. Let's shape the future of computing together.

Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Primary Location 

US, California, Santa Clara

Additional Locations

US, California, Folsom, US, Massachusetts, Beaver Brook, US, Oregon, Hillsboro, US, Texas, Austin

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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Questions & answers

What is the salary for this Compiler Engineer for Tile-based AI DSLs role?
Intel lists $150K – $285K per year.
Is this job remote?
It is on-site in Santa Clara, CA.
How do I apply to Intel?
Use the Apply button. It opens the application on Intel's own careers site; no account on Sudo Get Job is needed.
What do Software Engineer jobs pay in San Francisco Bay Area, CA?
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